Spiker-LL: An Energy-Efficient FPGA Accelerator Enabling Adaptive Local Learning in Spiking Neural Networks

Problem
This paper addresses the gap in deploying adaptive intelligence at the edge, particularly focusing on the high computational and energy costs associated with training neural models. While Spiking Neural Networks (SNNs) present a viable alternative for edge applications, the challenge lies in integrating hardware and algorithms effectively to enable on-device learning. The work introduces SPIKER-LL, an FPGA-based accelerator designed to facilitate local learning in SNNs, specifically utilizing the STSF (Spike-Timing-Dependent Synaptic Plasticity) learning rule. This is a preprint and has not yet undergone peer review.

Method
The core technical contribution of this work is the SPIKER-LL architecture, which builds upon the existing open-source Spiker+ inference framework. The authors implement targeted microarchitectural enhancements to support both inference and online learning with minimal computational overhead. The architecture is designed to be DSP-free, which is critical for energy efficiency in edge deployments. The paper details the integration of the STSF local learning rule into the FPGA architecture, allowing for adaptive learning directly on the device. The training compute requirements are not explicitly disclosed, but the architecture is optimized for low energy consumption, achieving less than 0.1 mJ per inference.

Results
SPIKER-LL demonstrates impressive performance metrics across several benchmarks, including MNIST, Fashion-MNIST (F-MNIST), and DIGITS. The system achieves up to 93% accuracy, with sub-millisecond latency for inference tasks. These results are significant when compared to traditional neural network accelerators, which often incur higher energy costs and latency. The authors do not provide specific baseline comparisons, but the performance metrics suggest a substantial improvement in efficiency and adaptability for edge applications.

Limitations
The authors acknowledge several limitations, including the potential scalability of the architecture beyond the tested benchmarks and the reliance on specific hardware configurations that may not generalize across all FPGA platforms. Additionally, the paper does not address the impact of varying input data distributions on the learning performance of SPIKER-LL, which could affect its robustness in real-world applications. The lack of peer review also raises questions about the reproducibility and validation of the results presented.

Why it matters
The implications of this work are significant for the field of edge AI, particularly in the context of energy-efficient computing. By enabling adaptive local learning in SNNs through a dedicated FPGA accelerator, SPIKER-LL paves the way for more intelligent and responsive edge devices. This could lead to advancements in applications such as robotics, IoT, and real-time data processing, where low latency and minimal energy consumption are critical. The integration of hardware and algorithmic strategies in this manner could inspire further research into co-design approaches for other types of neural networks and learning paradigms.

Authors: Alessio Caviglia, Filippo Marostica, Alessandro Savino, Stefano Di Carlo
Source: arXiv:2605.18003
URL: https://arxiv.org/abs/2605.18003v1